
show-filename:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400630 <_init>:
  400630:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400634:	910003fd 	mov	x29, sp
  400638:	9400004c 	bl	400768 <call_weak_fn>
  40063c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400640:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400650 <.plt>:
  400650:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400654:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf328>
  400658:	f947fe11 	ldr	x17, [x16, #4088]
  40065c:	913fe210 	add	x16, x16, #0xff8
  400660:	d61f0220 	br	x17
  400664:	d503201f 	nop
  400668:	d503201f 	nop
  40066c:	d503201f 	nop

0000000000400670 <memcpy@plt>:
  400670:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400674:	f9400211 	ldr	x17, [x16]
  400678:	91000210 	add	x16, x16, #0x0
  40067c:	d61f0220 	br	x17

0000000000400680 <malloc@plt>:
  400680:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400684:	f9400611 	ldr	x17, [x16, #8]
  400688:	91002210 	add	x16, x16, #0x8
  40068c:	d61f0220 	br	x17

0000000000400690 <__libc_start_main@plt>:
  400690:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400694:	f9400a11 	ldr	x17, [x16, #16]
  400698:	91004210 	add	x16, x16, #0x10
  40069c:	d61f0220 	br	x17

00000000004006a0 <isupper@plt>:
  4006a0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4006a4:	f9400e11 	ldr	x17, [x16, #24]
  4006a8:	91006210 	add	x16, x16, #0x18
  4006ac:	d61f0220 	br	x17

00000000004006b0 <__gmon_start__@plt>:
  4006b0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4006b4:	f9401211 	ldr	x17, [x16, #32]
  4006b8:	91008210 	add	x16, x16, #0x20
  4006bc:	d61f0220 	br	x17

00000000004006c0 <abort@plt>:
  4006c0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4006c4:	f9401611 	ldr	x17, [x16, #40]
  4006c8:	9100a210 	add	x16, x16, #0x28
  4006cc:	d61f0220 	br	x17

00000000004006d0 <puts@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4006d4:	f9401a11 	ldr	x17, [x16, #48]
  4006d8:	9100c210 	add	x16, x16, #0x30
  4006dc:	d61f0220 	br	x17

00000000004006e0 <strcmp@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4006e4:	f9401e11 	ldr	x17, [x16, #56]
  4006e8:	9100e210 	add	x16, x16, #0x38
  4006ec:	d61f0220 	br	x17

00000000004006f0 <strcpy@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  4006f4:	f9402211 	ldr	x17, [x16, #64]
  4006f8:	91010210 	add	x16, x16, #0x40
  4006fc:	d61f0220 	br	x17

0000000000400700 <printf@plt>:
  400700:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400704:	f9402611 	ldr	x17, [x16, #72]
  400708:	91012210 	add	x16, x16, #0x48
  40070c:	d61f0220 	br	x17

0000000000400710 <putchar@plt>:
  400710:	b0000090 	adrp	x16, 411000 <memcpy@GLIBC_2.17>
  400714:	f9402a11 	ldr	x17, [x16, #80]
  400718:	91014210 	add	x16, x16, #0x50
  40071c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400720 <_start>:
  400720:	d280001d 	mov	x29, #0x0                   	// #0
  400724:	d280001e 	mov	x30, #0x0                   	// #0
  400728:	aa0003e5 	mov	x5, x0
  40072c:	f94003e1 	ldr	x1, [sp]
  400730:	910023e2 	add	x2, sp, #0x8
  400734:	910003e6 	mov	x6, sp
  400738:	580000c0 	ldr	x0, 400750 <_start+0x30>
  40073c:	580000e3 	ldr	x3, 400758 <_start+0x38>
  400740:	58000104 	ldr	x4, 400760 <_start+0x40>
  400744:	97ffffd3 	bl	400690 <__libc_start_main@plt>
  400748:	97ffffde 	bl	4006c0 <abort@plt>
  40074c:	00000000 	.inst	0x00000000 ; undefined
  400750:	00400a98 	.word	0x00400a98
  400754:	00000000 	.word	0x00000000
  400758:	00400b10 	.word	0x00400b10
  40075c:	00000000 	.word	0x00000000
  400760:	00400b90 	.word	0x00400b90
  400764:	00000000 	.word	0x00000000

0000000000400768 <call_weak_fn>:
  400768:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf328>
  40076c:	f947f000 	ldr	x0, [x0, #4064]
  400770:	b4000040 	cbz	x0, 400778 <call_weak_fn+0x10>
  400774:	17ffffcf 	b	4006b0 <__gmon_start__@plt>
  400778:	d65f03c0 	ret
  40077c:	00000000 	.inst	0x00000000 ; undefined

0000000000400780 <deregister_tm_clones>:
  400780:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  400784:	9101a000 	add	x0, x0, #0x68
  400788:	b0000081 	adrp	x1, 411000 <memcpy@GLIBC_2.17>
  40078c:	9101a021 	add	x1, x1, #0x68
  400790:	eb00003f 	cmp	x1, x0
  400794:	540000a0 	b.eq	4007a8 <deregister_tm_clones+0x28>  // b.none
  400798:	90000001 	adrp	x1, 400000 <_init-0x630>
  40079c:	f945d821 	ldr	x1, [x1, #2992]
  4007a0:	b4000041 	cbz	x1, 4007a8 <deregister_tm_clones+0x28>
  4007a4:	d61f0020 	br	x1
  4007a8:	d65f03c0 	ret
  4007ac:	d503201f 	nop

00000000004007b0 <register_tm_clones>:
  4007b0:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4007b4:	9101a000 	add	x0, x0, #0x68
  4007b8:	b0000081 	adrp	x1, 411000 <memcpy@GLIBC_2.17>
  4007bc:	9101a021 	add	x1, x1, #0x68
  4007c0:	cb000021 	sub	x1, x1, x0
  4007c4:	9343fc21 	asr	x1, x1, #3
  4007c8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4007cc:	9341fc21 	asr	x1, x1, #1
  4007d0:	b40000a1 	cbz	x1, 4007e4 <register_tm_clones+0x34>
  4007d4:	90000002 	adrp	x2, 400000 <_init-0x630>
  4007d8:	f945dc42 	ldr	x2, [x2, #3000]
  4007dc:	b4000042 	cbz	x2, 4007e4 <register_tm_clones+0x34>
  4007e0:	d61f0040 	br	x2
  4007e4:	d65f03c0 	ret

00000000004007e8 <__do_global_dtors_aux>:
  4007e8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4007ec:	910003fd 	mov	x29, sp
  4007f0:	f9000bf3 	str	x19, [sp, #16]
  4007f4:	b0000093 	adrp	x19, 411000 <memcpy@GLIBC_2.17>
  4007f8:	3941a260 	ldrb	w0, [x19, #104]
  4007fc:	35000080 	cbnz	w0, 40080c <__do_global_dtors_aux+0x24>
  400800:	97ffffe0 	bl	400780 <deregister_tm_clones>
  400804:	52800020 	mov	w0, #0x1                   	// #1
  400808:	3901a260 	strb	w0, [x19, #104]
  40080c:	f9400bf3 	ldr	x19, [sp, #16]
  400810:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400814:	d65f03c0 	ret

0000000000400818 <frame_dummy>:
  400818:	17ffffe6 	b	4007b0 <register_tm_clones>

000000000040081c <case_insensitive>:
  40081c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400820:	910003fd 	mov	x29, sp
  400824:	39007fa0 	strb	w0, [x29, #31]
  400828:	39407fa0 	ldrb	w0, [x29, #31]
  40082c:	97ffff9d 	bl	4006a0 <isupper@plt>
  400830:	7100001f 	cmp	w0, #0x0
  400834:	540000a0 	b.eq	400848 <case_insensitive+0x2c>  // b.none
  400838:	39407fa0 	ldrb	w0, [x29, #31]
  40083c:	11008000 	add	w0, w0, #0x20
  400840:	12001c00 	and	w0, w0, #0xff
  400844:	14000002 	b	40084c <case_insensitive+0x30>
  400848:	39407fa0 	ldrb	w0, [x29, #31]
  40084c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400850:	d65f03c0 	ret

0000000000400854 <init>:
  400854:	d10043ff 	sub	sp, sp, #0x10
  400858:	b9000fff 	str	wzr, [sp, #12]
  40085c:	14000008 	b	40087c <init+0x28>
  400860:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  400864:	9101c000 	add	x0, x0, #0x70
  400868:	b9800fe1 	ldrsw	x1, [sp, #12]
  40086c:	f821781f 	str	xzr, [x0, x1, lsl #3]
  400870:	b9400fe0 	ldr	w0, [sp, #12]
  400874:	11000400 	add	w0, w0, #0x1
  400878:	b9000fe0 	str	w0, [sp, #12]
  40087c:	b9400fe0 	ldr	w0, [sp, #12]
  400880:	7100641f 	cmp	w0, #0x19
  400884:	54fffeed 	b.le	400860 <init+0xc>
  400888:	d503201f 	nop
  40088c:	910043ff 	add	sp, sp, #0x10
  400890:	d65f03c0 	ret

0000000000400894 <hash>:
  400894:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400898:	910003fd 	mov	x29, sp
  40089c:	f9000fa0 	str	x0, [x29, #24]
  4008a0:	f9400fa0 	ldr	x0, [x29, #24]
  4008a4:	39400000 	ldrb	w0, [x0]
  4008a8:	97ffffdd 	bl	40081c <case_insensitive>
  4008ac:	12001c00 	and	w0, w0, #0xff
  4008b0:	51018400 	sub	w0, w0, #0x61
  4008b4:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008b8:	d65f03c0 	ret

00000000004008bc <search>:
  4008bc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4008c0:	910003fd 	mov	x29, sp
  4008c4:	f9000fa0 	str	x0, [x29, #24]
  4008c8:	f9400fa0 	ldr	x0, [x29, #24]
  4008cc:	97fffff2 	bl	400894 <hash>
  4008d0:	b90027a0 	str	w0, [x29, #36]
  4008d4:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4008d8:	9101c000 	add	x0, x0, #0x70
  4008dc:	b98027a1 	ldrsw	x1, [x29, #36]
  4008e0:	f8617800 	ldr	x0, [x0, x1, lsl #3]
  4008e4:	f100001f 	cmp	x0, #0x0
  4008e8:	54000280 	b.eq	400938 <search+0x7c>  // b.none
  4008ec:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4008f0:	9101c000 	add	x0, x0, #0x70
  4008f4:	b98027a1 	ldrsw	x1, [x29, #36]
  4008f8:	f8617800 	ldr	x0, [x0, x1, lsl #3]
  4008fc:	f90017a0 	str	x0, [x29, #40]
  400900:	1400000b 	b	40092c <search+0x70>
  400904:	f94017a0 	ldr	x0, [x29, #40]
  400908:	f9400fa1 	ldr	x1, [x29, #24]
  40090c:	97ffff75 	bl	4006e0 <strcmp@plt>
  400910:	7100001f 	cmp	w0, #0x0
  400914:	54000061 	b.ne	400920 <search+0x64>  // b.any
  400918:	52800020 	mov	w0, #0x1                   	// #1
  40091c:	14000008 	b	40093c <search+0x80>
  400920:	f94017a0 	ldr	x0, [x29, #40]
  400924:	f9400c00 	ldr	x0, [x0, #24]
  400928:	f90017a0 	str	x0, [x29, #40]
  40092c:	f94017a0 	ldr	x0, [x29, #40]
  400930:	f100001f 	cmp	x0, #0x0
  400934:	54fffe81 	b.ne	400904 <search+0x48>  // b.any
  400938:	52800000 	mov	w0, #0x0                   	// #0
  40093c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400940:	d65f03c0 	ret

0000000000400944 <insert>:
  400944:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400948:	910003fd 	mov	x29, sp
  40094c:	f9000fa0 	str	x0, [x29, #24]
  400950:	f9400fa0 	ldr	x0, [x29, #24]
  400954:	97ffffda 	bl	4008bc <search>
  400958:	7100001f 	cmp	w0, #0x0
  40095c:	540004c1 	b.ne	4009f4 <insert+0xb0>  // b.any
  400960:	f9400fa0 	ldr	x0, [x29, #24]
  400964:	97ffffcc 	bl	400894 <hash>
  400968:	b9002fa0 	str	w0, [x29, #44]
  40096c:	d2800400 	mov	x0, #0x20                  	// #32
  400970:	97ffff44 	bl	400680 <malloc@plt>
  400974:	f90013a0 	str	x0, [x29, #32]
  400978:	f94013a0 	ldr	x0, [x29, #32]
  40097c:	f9400fa1 	ldr	x1, [x29, #24]
  400980:	97ffff5c 	bl	4006f0 <strcpy@plt>
  400984:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  400988:	9101c000 	add	x0, x0, #0x70
  40098c:	b9802fa1 	ldrsw	x1, [x29, #44]
  400990:	f8617800 	ldr	x0, [x0, x1, lsl #3]
  400994:	f100001f 	cmp	x0, #0x0
  400998:	54000181 	b.ne	4009c8 <insert+0x84>  // b.any
  40099c:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4009a0:	9101c000 	add	x0, x0, #0x70
  4009a4:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009a8:	f94013a2 	ldr	x2, [x29, #32]
  4009ac:	f8217802 	str	x2, [x0, x1, lsl #3]
  4009b0:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4009b4:	9101c000 	add	x0, x0, #0x70
  4009b8:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009bc:	f8617800 	ldr	x0, [x0, x1, lsl #3]
  4009c0:	f9000c1f 	str	xzr, [x0, #24]
  4009c4:	1400000c 	b	4009f4 <insert+0xb0>
  4009c8:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4009cc:	9101c000 	add	x0, x0, #0x70
  4009d0:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009d4:	f8617801 	ldr	x1, [x0, x1, lsl #3]
  4009d8:	f94013a0 	ldr	x0, [x29, #32]
  4009dc:	f9000c01 	str	x1, [x0, #24]
  4009e0:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  4009e4:	9101c000 	add	x0, x0, #0x70
  4009e8:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009ec:	f94013a2 	ldr	x2, [x29, #32]
  4009f0:	f8217802 	str	x2, [x0, x1, lsl #3]
  4009f4:	d503201f 	nop
  4009f8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4009fc:	d65f03c0 	ret

0000000000400a00 <show_all>:
  400a00:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400a04:	910003fd 	mov	x29, sp
  400a08:	f9000bbf 	str	xzr, [x29, #16]
  400a0c:	b9001fbf 	str	wzr, [x29, #28]
  400a10:	1400001c 	b	400a80 <show_all+0x80>
  400a14:	b0000080 	adrp	x0, 411000 <memcpy@GLIBC_2.17>
  400a18:	9101c000 	add	x0, x0, #0x70
  400a1c:	b9801fa1 	ldrsw	x1, [x29, #28]
  400a20:	f8617800 	ldr	x0, [x0, x1, lsl #3]
  400a24:	f9000ba0 	str	x0, [x29, #16]
  400a28:	f9400ba0 	ldr	x0, [x29, #16]
  400a2c:	f100001f 	cmp	x0, #0x0
  400a30:	54000220 	b.eq	400a74 <show_all+0x74>  // b.none
  400a34:	b9401fa0 	ldr	w0, [x29, #28]
  400a38:	11018401 	add	w1, w0, #0x61
  400a3c:	90000000 	adrp	x0, 400000 <_init-0x630>
  400a40:	912f0000 	add	x0, x0, #0xbc0
  400a44:	97ffff2f 	bl	400700 <printf@plt>
  400a48:	14000006 	b	400a60 <show_all+0x60>
  400a4c:	f9400ba0 	ldr	x0, [x29, #16]
  400a50:	97ffff20 	bl	4006d0 <puts@plt>
  400a54:	f9400ba0 	ldr	x0, [x29, #16]
  400a58:	f9400c00 	ldr	x0, [x0, #24]
  400a5c:	f9000ba0 	str	x0, [x29, #16]
  400a60:	f9400ba0 	ldr	x0, [x29, #16]
  400a64:	f100001f 	cmp	x0, #0x0
  400a68:	54ffff21 	b.ne	400a4c <show_all+0x4c>  // b.any
  400a6c:	52800140 	mov	w0, #0xa                   	// #10
  400a70:	97ffff28 	bl	400710 <putchar@plt>
  400a74:	b9401fa0 	ldr	w0, [x29, #28]
  400a78:	11000400 	add	w0, w0, #0x1
  400a7c:	b9001fa0 	str	w0, [x29, #28]
  400a80:	b9401fa0 	ldr	w0, [x29, #28]
  400a84:	7100641f 	cmp	w0, #0x19
  400a88:	54fffc6d 	b.le	400a14 <show_all+0x14>
  400a8c:	d503201f 	nop
  400a90:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a94:	d65f03c0 	ret

0000000000400a98 <main>:
  400a98:	a9b67bfd 	stp	x29, x30, [sp, #-160]!
  400a9c:	910003fd 	mov	x29, sp
  400aa0:	90000000 	adrp	x0, 400000 <_init-0x630>
  400aa4:	91316001 	add	x1, x0, #0xc58
  400aa8:	910063a0 	add	x0, x29, #0x18
  400aac:	aa0103e3 	mov	x3, x1
  400ab0:	d2801001 	mov	x1, #0x80                  	// #128
  400ab4:	aa0103e2 	mov	x2, x1
  400ab8:	aa0303e1 	mov	x1, x3
  400abc:	97fffeed 	bl	400670 <memcpy@plt>
  400ac0:	52800200 	mov	w0, #0x10                  	// #16
  400ac4:	b9009ba0 	str	w0, [x29, #152]
  400ac8:	b9009fbf 	str	wzr, [x29, #156]
  400acc:	14000009 	b	400af0 <main+0x58>
  400ad0:	b9809fa0 	ldrsw	x0, [x29, #156]
  400ad4:	d37df000 	lsl	x0, x0, #3
  400ad8:	910063a1 	add	x1, x29, #0x18
  400adc:	f8606820 	ldr	x0, [x1, x0]
  400ae0:	97ffff99 	bl	400944 <insert>
  400ae4:	b9409fa0 	ldr	w0, [x29, #156]
  400ae8:	11000400 	add	w0, w0, #0x1
  400aec:	b9009fa0 	str	w0, [x29, #156]
  400af0:	b9409fa1 	ldr	w1, [x29, #156]
  400af4:	b9409ba0 	ldr	w0, [x29, #152]
  400af8:	6b00003f 	cmp	w1, w0
  400afc:	54fffeab 	b.lt	400ad0 <main+0x38>  // b.tstop
  400b00:	97ffffc0 	bl	400a00 <show_all>
  400b04:	52800000 	mov	w0, #0x0                   	// #0
  400b08:	a8ca7bfd 	ldp	x29, x30, [sp], #160
  400b0c:	d65f03c0 	ret

0000000000400b10 <__libc_csu_init>:
  400b10:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b14:	910003fd 	mov	x29, sp
  400b18:	a901d7f4 	stp	x20, x21, [sp, #24]
  400b1c:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf328>
  400b20:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf328>
  400b24:	91374294 	add	x20, x20, #0xdd0
  400b28:	913722b5 	add	x21, x21, #0xdc8
  400b2c:	a902dff6 	stp	x22, x23, [sp, #40]
  400b30:	cb150294 	sub	x20, x20, x21
  400b34:	f9001ff8 	str	x24, [sp, #56]
  400b38:	2a0003f6 	mov	w22, w0
  400b3c:	aa0103f7 	mov	x23, x1
  400b40:	9343fe94 	asr	x20, x20, #3
  400b44:	aa0203f8 	mov	x24, x2
  400b48:	97fffeba 	bl	400630 <_init>
  400b4c:	b4000194 	cbz	x20, 400b7c <__libc_csu_init+0x6c>
  400b50:	f9000bb3 	str	x19, [x29, #16]
  400b54:	d2800013 	mov	x19, #0x0                   	// #0
  400b58:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400b5c:	aa1803e2 	mov	x2, x24
  400b60:	aa1703e1 	mov	x1, x23
  400b64:	2a1603e0 	mov	w0, w22
  400b68:	91000673 	add	x19, x19, #0x1
  400b6c:	d63f0060 	blr	x3
  400b70:	eb13029f 	cmp	x20, x19
  400b74:	54ffff21 	b.ne	400b58 <__libc_csu_init+0x48>  // b.any
  400b78:	f9400bb3 	ldr	x19, [x29, #16]
  400b7c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400b80:	a942dff6 	ldp	x22, x23, [sp, #40]
  400b84:	f9401ff8 	ldr	x24, [sp, #56]
  400b88:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400b8c:	d65f03c0 	ret

0000000000400b90 <__libc_csu_fini>:
  400b90:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400b94 <_fini>:
  400b94:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400b98:	910003fd 	mov	x29, sp
  400b9c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400ba0:	d65f03c0 	ret
